Semiconductor Integrated Circuit Design and Applications

• Design of Pipelined A/D Converters
• Digital Signal Processors: Fundamentals, Design, and Applications
• Electronic Design Automation
• Low-Power Design and Power Management in Integrated Circuits
• Non-Volatile Memory Technology, Design, Applications, and Future Trends
• Oversampling A/D and D/A Conversion
• Power-Optimized Operational Transconductance
  Amplifier Design
• VLSI Digital Design
• Wireless System Design
• Wireless Transceiver Building Blocks
• WLAN Transceiver Design: A Walk-Through Case Study
  

Design of Pipelined A/D Converters
Boris Murmann, Ph.D., Assistant Professor, Department of Electrical Engineering, Stanford University

Pipelined Analog-to-Digital Converters (ADCs) have evolved as a predominant topology for broadband quantization in applications requiring 8-14 bit resolution and Nyquist sampling rates of 10-200MS/s. This course discusses the design and implementation of pipelined ADCs using a top-down approach, ranging from architecture level analysis of non-idealities to basic considerations in the transistor level implementation of the constituent building blocks.
(213 minutes)

Digital Signal Processors: Fundamentals, Design, and Applications
Gene Frantz, Principal Fellow, Texas Instruments

It seems the world is going digital and a significant contributor to this trend is Digital Signal Processing (DSP). DSP can either mean digital signal processing, the theoretical aspects, or digital signal processors, the devices that execute DSP algorithms. This course will overview both the theory of DSP and the hardware architectures of DSP devices. Finally several of the applications which use DSP will be covered.
(197 minutes)

Electronic Design Automation
Raul Camposano, Ph.D., Sr. VP, CTO, Synopsys, Inc.

Electronic Design Automation (EDA) is at the center of any design methodology for integrated circuits. This course gives a brief introduction to the EDA industry and business aspects, with a focus on EDA technology and applications. We review the classical design implementation and verification flows. We will also cover the newer areas of design for manufacturing (DFM) and intellectual property (IP). The class is geared towards the user of EDA technology, covering current state-of-the-art methodologies / tools and the challenges ahead as we move to the 65-nm technology node.
(210 minutes)

Low-Power Design and Power Management in Integrated Circuits
Jan Rabaey, Ph.D., Donald O. Pederson Distinguished Professor, Electrical Engineering & Computer Science (EECS) Department, University of California, Berkeley

The course will start with an overview of the sources of power dissipation in modern digital circuits and a projection towards the future. Next, power reduction / optimization techniques will be introduced at multiple levels of the design abstraction chain: device, circuit, architecture and system. It will become clear that cross-optimization between the layers is the only means of getting substantial reductions in power dissipation. The concepts will be illustrated with a case study – wireless sensor networks.
(206 minutes)

Non-Volatile Memory Technology, Design, Applications, and Future Trends
Mark Bauer, Senior Principal Engineer, Intel Corporation

Re-programmable solid-state Non-Volatile Memories (NVM) have been commercially available in the semiconductor industry for over three decades. From the early days of EPROM and EEPROM, to current Flash technologies, the industry has seen many innovations and surmounted many technical challenges. In various forms, the floating gate structure has been the workhorse of non-volatile memories to date. There have been many floating gate cell structures and architectures developed over the years, with the current mainstay technologies being NOR and NAND flash memory. This course will teach the device fundamentals, design, architecture and applications of existing NAND and NOR technologies. In addition, we will discuss the device fundamentals and applications other than stacked gate technologies, such as AND and DiNOR, as well as other silicon-based NVM technologies such as nitride storage, non-silicon-based NVM technologies such as FeRAM and MRAM, and future technologies such as OUM (Ovonic Unified Memory). This course will be partitioned into four sections. The first section will cover the device fundamentals and structures of the various storage technologies. The second and third sections will take an in-depth look into the architecture and design of NOR and NAND flash memory—the current NVM market leaders. The final section will look into applications of current and potential future NMV technologies.
(222 minutes)

Oversampling A/D and D/A Conversion
Bruce Wooley, Ph.D., Professor and Chairman, Department of Electrical Engineering, Stanford University

This course will cover the fundamentals, architecture, transistor-level design, performance, and applications of oversampling A/D and D/A data conversion integrated circuits.
(187 minutes)

Power-Optimized Operational Transconductance
Amplifier Design
Bernhard Boser, Ph.D., University of California, Berkeley

Transconductance amplifiers (OTAs) are the equivalent of logic gates for analog circuits. Key building blocks in analog filters and converters, OTA performance has a significant impact on overall system capability and power dissipation. This course focuses on specifying and designing OTAs, with emphasis on, device models for analog design, representation and analysis of noise and dynamic range in analog circuits with special emphasis on sampling noise, biasing and current sources, feedback, stability, compensation, step response, doublets, slewing and OTA design examples.
(220 minutes)

VLSI Digital Design
Jason Stinson, Principal Engineer, Enterprise Processor Division, Intel Corporation

This course will focus on digital IC design. The first portion of the course will cover basic design: digital logic families (CMOS, domino, CPL), clocking, sequentials, and interconnect design. The second half of the course will talk about some of the issues facing modern design: low power, signal integrity, large scale design integration and debug/test.
(208 minutes)

Wireless System Design
Andrea Goldsmith, Ph.D., Professor of Electrical Engineering, Stanford University

This course will review key concepts in wireless system design and the current state-of-the-art in wireless technology. The new paradigm of cross-layer design spanning the hardware, link, network, and application layer for emerging applications such as sensing, automatic control, and multimedia communications will be discussed. Unique design challenges in wireless systems with hard energy constraints, as arise in sensor network design, will also be elaborated.
(162 minutes)

Wireless Transceiver Building Blocks
Thomas Lee, Ph.D., Professor of Electrical Engineering, Stanford University

This course presents an overview of WLAN transceiver building blocks, with emphasis on transistor-level design considerations. The topics to be covered include low-noise amplifiers: single-ended vs. differential, matching, and oscillators.
(183 minutes)

WLAN Transceiver Design: A Walk-Through Case Study
David Su, Ph.D., Director of Analog Design, Atheros Communications

This course focuses on the system-level specifications of WLAN transceiver circuits and a walk-through case study of an existing Wireless LAN system. Part 1 covers an overview of the WLAN systems / architecture and the system-level specifications including the frequency plan, receive and transmitter. Part 2 provides a walk-through case study of an existing WLAN system and survey of recent literature on WLAN.
(137 minutes)